As technologies evolve, semiconductor process nodes have been scaled down for high density integrated circuits. As a result, the form factor of integrated circuit has been improved from shrinking the semiconductor process node (e.g., shrink the process node towards the sub-20 nm node). As semiconductor devices are scaled down, new techniques are needed to maintain the electronic components' performance from one generation to the next. For example, transistors formed by high carrier mobility materials such as III-V materials, germanium and/or the like are desirable for high density and high speed integrated circuits.
Germanium and silicon are group IV elements in the periodic table. In comparison with silicon, germanium is of higher carrier and hole mobility. The higher carrier and hole mobility of germanium may lead to better device electrical properties. For example, the lattice electron mobility of silicon is 1417 cm2/V-sec. In contrast, the lattice electron mobility of germanium is 3900 cm2/V-sec. The electron mobility of germanium is about 2.75 times more than that of silicon. Such higher electron mobility of germanium leads to higher drive current and smaller gate delay. It should be noted that some group III-V materials may be used to replace silicon because some of group III_V materials may have much higher mobility than germanium and silicon.
Another advantageous feature of germanium based transistors is that germanium is of a smaller band gap. More particularly, the band gap of germanium is about 0.6 eV compared to 1.2 eV for silicon. Such a smaller band gap helps to reduce the threshold voltage of germanium based transistors.
Germanium is of various advantages in comparison with silicon. However, silicon wafers are dominant in the semiconductor industry because the cost of germanium wafers is very high. One widely accepted solution of fabricating germanium based transistor is growing germanium active regions on silicon substrates through an epitaxial growth process.
Growing a germanium layer on a silicon substrate is commonly referred to as germanium-silicon hetero-epitaxial growth. The lattice constant of germanium is about 4.2% more than the lattice constant of silicon. When a germanium layer is grown on a silicon substrate, the germanium layer is compressively strained to fit the lattice spacing of the silicon substrate. After the germanium layer is grown more than a critical thickness, the strain may be relieved by forming a variety of threading dislocations. Such threading dislocations are defects, which may degrade electrical properties of germanium based transistors.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the various embodiments and are not necessarily drawn to scale.